Repairing The X68000 CRTC With A Replacement FPGA Module

The Sharp X68000 remains one of the most interesting Japanese home computers because its video hardware sits close to the machine’s identity. Its sharp sprites, scrolling performance and distinctive RGB output depend on a group of custom chips that are now several decades old. When the cathode-ray tube display shows unstable sync, a blank raster or corrupted character rows, the CRTC is one of the components worth investigating.

A failed CRTC is a serious repair because the original integrated circuit is difficult to source and cannot be sensibly repaired at transistor level. A replacement FPGA module offers another path: reproduce the required timing and bus behaviour in programmable logic, then connect it through an adapter designed for the particular X68000 board revision. This is a recreation project rather than a simple chip swap.

The work suits an enthusiast who is comfortable with a multimeter, oscilloscope and careful fault isolation. It also demands respect for the computer’s power supply, high-voltage display circuitry and static-sensitive logic. A replacement video controller can preserve a machine that would otherwise become a parts donor, but only if its electrical and timing behaviour is understood first.

For Australian owners, the repair has a few practical complications. Japanese imports often arrive through eBay, Yahoo Auctions agents or specialist retro sellers, while replacement parts may spend a week or two in transit through Sydney or Melbourne. A rainy afternoon in a Brisbane shed, a dry Adelaide workshop or a hot Perth garage can all affect storage and soldering conditions, so the board should be allowed to reach room temperature before testing.

What The CRTC Does In An X68000

The CRTC, or cathode-ray-tube controller, generates much of the display timing used by the X68000. It works with the video RAM and related custom logic to define when pixels are fetched, when horizontal and vertical synchronisation pulses occur, and how the active picture is positioned within the scan. It does not function as a modern graphics processor with a framebuffer API; it is part of a tightly coordinated hardware system.

That distinction matters when developing an FPGA replacement. The logic must respond correctly to register writes from the 68000 CPU, produce memory access activity at the expected times and expose sync signals with suitable polarity and duration. A picture that appears roughly correct on a modern converter may still indicate an inaccurate implementation if software relying on raster timing, split screens or frequent display-register changes behaves incorrectly.

Symptoms of a CRTC fault can overlap with problems in VRAM, clock generation, the video bus, reset circuitry or the monitor cable. A completely black screen is not proof that the controller has failed. Check the power rails, oscillator output, reset release and the presence of activity on the address and data buses before condemning the original IC.

Establishing The Fault Before Removal

Begin with visual inspection and a serviceable test setup. Look for cracked solder joints, corrosion around connectors, damaged traces and previous rework. Measure the regulated supply rails with the machine switched off first, then perform powered measurements only where the board documentation makes the test points clear. The X68000 is connected to mains voltages that can remain hazardous inside the power supply, so its primary side should be treated as a separate repair.

A logic analyser can reveal whether the CRTC receives a clock, reset and CPU transactions. An oscilloscope is more useful for examining clock quality and sync timing. Compare the horizontal and vertical outputs against a known-good machine or published timing information. If the controller is still producing clean bus activity but one output is stuck, the evidence for an internal failure becomes stronger.

Do not use a replacement module to mask an unresolved power fault. Excessive ripple, a missing ground connection or a marginal clock can make a new FPGA appear defective. Record the original board’s behaviour, including the monitor type, software used and exact screen symptom. Keeping photographs and notes in a repair diary, such as the project records on X68K.NET’s diary, makes later comparison much easier.

Designing A Practical FPGA Replacement

An FPGA recreation normally contains several blocks: a CPU bus interface, register file, timing counters, display-address generation and sync logic. Depending on the target, it may need to reproduce only the CRTC function or also bridge signals that the original chip exchanged with neighbouring custom devices. The safest design begins with a written signal map and a timing diagram rather than HDL written from guesses.

The module’s FPGA must have enough logic resources, suitable I/O voltage tolerance and a reliable configuration method. Many contemporary development boards use 3.3-volt I/O, while vintage X68000 logic can expose 5-volt TTL signals. A 3.3-volt output may be accepted by some 5-volt inputs, but a 5-volt output can damage an FPGA input. Use proper level translation, series resistors where appropriate and a documented common-ground arrangement.

Physical construction is equally important. A small carrier board can hold the FPGA, regulator, configuration memory and level shifters, while an interposer routes the original socket signals. Pin compatibility should never be assumed from package shape alone. Check the CRTC part number, socket orientation and board revision, then verify every connection against continuity measurements. A keyed connector and clear silkscreen can prevent an expensive upside-down installation.

Timing, Compatibility And FPGA Limits

The replacement must reproduce the video modes that make the computer useful. The X68000 can output 15 kHz and 31 kHz scan rates, and software may switch modes or adjust display parameters while running. Horizontal total, vertical total, blanking intervals, sync polarity and active display position all influence whether an RGB monitor or scan converter locks correctly.

A modern FPGA can generate these signals with impressive precision, yet precision alone is not compatibility. The original CRTC may have propagation delays, bus hold behaviour and edge relationships that other custom chips expect. If the FPGA changes an address too early or releases a bus line too late, the image may contain intermittent corruption even when the sync frequency looks right.

The following comparison helps separate a faithful replacement from a convenient video workaround:

Approach	Preserves original timing	Installation effort	Main limitation
Original CRTC repair or replacement	Usually yes	Moderate to high	Scarce parts and uncertain condition
FPGA CRTC interposer	Potentially yes	High	Requires accurate reverse engineering
Whole video-board replacement	Depends on design	High	May alter software compatibility
External scan converter	No	Low to moderate	Cannot correct a failed internal controller
Custom CPLD substitute	Sometimes	High	Limited resources for complex behaviour

Test compatibility with several categories of software rather than a single game. Use a text screen, a sprite-heavy title, a graphics utility and a program known to alter display registers. Check cold boot, warm reset and repeated mode changes. A module that works only after a power cycle may have an incomplete reset state or configuration timing problem.

Installing The Module Safely

Before fitting the FPGA carrier, disconnect the computer, remove expansion boards and document the original chip orientation. If the CRTC is socketed, use an extraction tool that lifts both ends evenly. If it is soldered, protect nearby plastic connectors and avoid prolonged heat on fragile plated-through holes. A replacement should be reversible wherever possible, which favours a socketed adapter over cutting traces.

Inspect the socket after removal. Oxidised contacts can create faults that look like a failed controller, and a loose socket can produce a picture that changes when the chassis is tapped. Clean only with an appropriate contact method and replace a damaged socket rather than forcing thicker module pins into it. Confirm continuity from the adapter to the relevant test points before applying power.

Initial power-up should use current limiting and, ideally, a bench supply or a suitable protection method on the low-voltage side. Watch the FPGA regulator for excess current and check that configuration completes. Do not probe the display’s high-voltage section simply because the screen remains dark; the module is a logic repair, not a reason to work near the CRT anode.

A good first test is to confirm reset, clock and bus activity without connecting a valuable monitor. Then attach a known-compatible display or scan converter and compare the horizontal and vertical rates. If the machine produces an image with incorrect colours or unstable geometry, investigate the RGB path, sync wiring and monitor standard separately from the FPGA logic.

Verification And Long-Term Reliability

Verification should cover electrical levels, timing and software behaviour. Measure the FPGA’s local supply under load, check edge quality at the adapter, and confirm that no input exceeds its rated voltage during reset or shutdown. A level-shifting circuit that works on the bench can still fail after warming up if it is poorly terminated or powered from an unstable rail.

Record the expected timing values in the module documentation. Include the FPGA part number, firmware revision, supported X68000 models, adapter pinout and any known limitations. If the design is open for community use, provide test points for clock, reset, sync and bus signals. Future owners will be grateful for a module that can be diagnosed without removing it from the machine.

Australian conditions make storage worth considering. Keep the repaired computer away from damp coastal air in places such as Wollongong or Hobart, and avoid leaving it in a closed car during a hot summer day in Western Australia or Queensland. Replacement modules should be stored in antistatic packaging, with connectors protected from dust and humidity. When importing a board, allow cold parcels from overseas freight to acclimatise before powering them.

Preservation also means retaining the failed original CRTC when possible. Even a dead chip may provide useful package information, pin measurements or evidence for future reverse engineering. Label it with the machine model and fault symptoms rather than throwing it into a parts box. Community projects often advance because someone kept an apparently useless component and documented what happened.

A Repair That Extends The Platform

A CRTC FPGA module is most valuable when it behaves as a faithful substitute, not merely as a way to force a picture onto a screen. The design should respect the original bus interface, scan modes and interaction with the X68000’s other video logic. That approach gives owners a better chance of running period software while keeping the machine’s original architecture intact.

The work also illustrates why retrocomputing preservation is more than replacing capacitors. It combines fault diagnosis, digital design, PCB layout, firmware testing and careful historical research. An enthusiast in Melbourne, Canberra or regional New South Wales may have to source Japanese documentation and wait for parts, but a disciplined repair process can turn that inconvenience into useful community knowledge.

Anyone developing a module should publish measured results, supported board revisions and installation warnings. Clear evidence is more useful than promising universal compatibility. Include photographs of the adapter, timing captures, firmware hashes and a recovery procedure so another owner can reproduce the repair without guessing.

If your X68000 has a suspected CRTC fault, start by documenting its symptoms and checking the surrounding clocks, rails and buses. Preserve the original chip, test every adapter connection and validate the FPGA across multiple display modes. Sharing those findings with the wider X68000 community helps keep these remarkable computers running in Australia and everywhere else they have found a second life.