Using a Logic Analyzer to Reverse Engineer the X68000 Video DAC

The Sharp X68000’s video output sits at the meeting point between digital graphics data and an analogue display signal. That makes it an attractive target for reverse engineering: the palette, pixel timing, colour channels and synchronisation signals can often be understood by observing the hardware rather than relying solely on incomplete schematics.

A logic analyzer is especially useful when it is treated as a timing and correlation instrument. It will not replace an oscilloscope for measuring analogue voltage levels, impedance or signal quality, but it can reveal which bus transactions change the picture, when colour data appears, and how the video circuit responds to software-controlled palette updates. For Australian enthusiasts working with scarce Japanese hardware, this approach can reduce the risk of random modifications and expensive replacement parts.

Choosing The Right Capture Strategy

Begin by defining the question you want the instrument to answer. “What does the video DAC do?” is too broad. More useful questions include whether the colour data is serial or parallel, whether the palette is written through the main CPU bus, which bits control each RGB channel, and whether the DAC receives a dedicated pixel clock.

The X68000 video system may expose several useful observation points: CPU address and data lines, write strobes, palette RAM or register-select signals, pixel data, RGB outputs and horizontal or vertical synchronisation. Capturing everything at once is tempting, but a large probe count can introduce loading, tangled wiring and confusing trigger conditions. Start with the smallest group that can distinguish one hypothesis from another.

A 16-channel USB logic analyzer can be enough for a narrow experiment, such as monitoring an 8-bit data path plus control signals. A larger analyser becomes valuable when comparing a 68000 bus cycle with pixel timing. Select an instrument with genuine sampling performance rather than relying on inflated marketing figures. For a signal around 10 MHz, several times the clock frequency may show transitions, but a clean reconstruction of narrow strobes benefits from a much higher rate.

Mapping The Video Signal Path

Before probing, document the board visually. Photograph both sides at high resolution, mark connector pins, trace likely ground points, and identify chips near the video output connector. Look for resistor networks, analogue multipliers, palette memory, custom Sharp LSIs and crystal or oscillator circuits. A short continuity test with the machine unplugged can reveal whether an output pin travels directly to a resistor ladder or first enters another integrated circuit.

The DAC may be a discrete resistor network, a custom video LSI, or a combination of digital logic and analogue buffering. Do not assume that a chip labelled as a graphics controller contains the entire conversion stage. RGB intensity may be generated through weighted resistors, while sync is produced elsewhere and combined later. A circuit that looks like a DAC on the schematic can also include termination, level shifting or blanking functions.

Use the service manual and board silkscreen as starting points, then verify every important connection on the actual revision in front of you. Japanese computers often exist in several board revisions, and a trace that appears identical in photographs may move to a different via or connector pin. This is particularly important when importing a machine into Australia, where replacement boards and donor parts can take weeks to arrive from Japan.

A practical early test is to boot a program that displays large areas of black, white, red, green and blue. A solid-colour test screen makes it easier to associate changing logic states with a visible channel. If you need a controlled peripheral reference while preparing a test machine, the documented battery-backed clock project demonstrates the value of recording exact board revisions and signal assumptions before modifying original hardware.

Probing The X68000 Safely

The safest first connection is ground. Attach the analyser’s ground lead to a nearby digital ground point, keep the lead short, and avoid clipping onto a floating shield or analogue output return. Long ground wires can act as antennas and produce ringing that looks like extra data. If the analyser has a flying-lead harness, label each channel before powering the computer.

Check voltage compatibility before connecting anything. Most X68000 logic signals are expected to be around 5 V TTL levels, while many modern low-cost analysers are designed for 3.3 V inputs and may tolerate 5 V only at their input pins. Confirm the specifications instead of trusting a generic marketplace listing. A proper level translator or high-impedance buffer is cheaper than damaging a capture device or a custom Sharp chip.

The logic analyser must never be connected directly to analogue RGB outputs unless its input limits and the circuit conditions are known. An RGB line can have a voltage waveform and termination arrangement that is unsuitable for a digital input. Use an oscilloscope probe, a suitable comparator, or a buffered test point when converting an analogue observation into a logic-level event.

Mains safety deserves special attention during repair work. Australian power is nominally 230–240 V, and an imported Japanese machine may use a different mains lead, fuse arrangement or power supply modification. Disconnect the computer before continuity testing, discharge high-voltage sections appropriately, and keep the exposed chassis away from casual bench clutter. Jaycar and local electronics suppliers can provide probes, headers and resistors, but generic accessories still need to be checked against the circuit’s electrical requirements.

Designing Useful Experiments

A controlled palette-write experiment is more informative than capturing an entire game. Write a known colour to one palette entry, display many pixels using that entry, then change one colour component at a time. Capture the bus transactions around each write. If the screen changes after a pair of writes, the palette may use a multi-byte format; if one write alters several shades, the address or data interpretation may be different from the initial assumption.

Use a repeatable trigger. A write strobe combined with a suspected palette address range is usually more useful than triggering on the first activity after reset. Capture a short window before and after the event, then repeat with red, green and blue values changed independently. Keep a notebook containing the software routine, register address, data value, display mode and capture filename.

A second experiment should examine timing. Capture a suspected pixel clock or digital colour bus together with horizontal sync. Measure the number of data transitions within one line and compare them with the visible display mode. The X68000 supports several scan formats, so a capture made in a 15 kHz mode should not be treated as representative of 31 kHz output. This distinction matters when testing with a modern converter or an RGB monitor.

Australian displays can add confusion. A common PAL television may accept composite video but reject the X68000’s RGB timing, while a suitable PVM or multisync monitor can be costly on eBay Australia. The better option is often to capture the electrical signals first and use a known-compatible display later. Retrocomputing groups in Melbourne, Sydney and Brisbane can be useful sources of monitors and advice, but verify each display’s sync requirements before connecting an unknown Japanese signal.

Instrument or method	Best evidence	Main limitation	Suitable use
Logic analyzer	Digital bus states, register writes and timing relationships	Cannot accurately measure analogue amplitude or waveform quality	Palette access, pixel clocks and sync correlation
Oscilloscope	Voltage levels, rise time, ringing and analogue DAC behaviour	Decoding a wide bus is slower and more manual	RGB output integrity and resistor-ladder analysis
Mixed-signal oscilloscope	Synchronized digital and analogue traces	Higher cost and more setup effort	Relating palette writes to actual RGB voltage changes
Multimeter and continuity tester	Power rails, resistance and board connectivity	No timing information	Initial mapping and safety checks
Video capture or monitor	Visible image and mode compatibility	May hide electrical faults or reject unusual timing	Confirming the practical display result

Reading Captures Without Guessing

The first task is to separate meaningful events from background activity. A 68000 bus capture can contain refresh-related operations, interrupt service, video memory accesses and unrelated peripheral traffic. Label channels clearly in the analyser software and decode only the control signals you have verified. An incorrect active-low setting can make a valid write appear to be a read.

Look for repeated patterns. If a palette update consistently appears as an address phase followed by a data phase, compare the address bits across several writes. If only the low byte changes, the relevant register may be byte-wide even though the CPU bus is wider. If the same data value appears at a fixed interval aligned with horizontal sync, the signal may be part of video generation rather than a software register transaction.

Export captures as CSV or a native project file and retain the original untouched recording. A small script can group bus cycles, calculate intervals and compare writes between experiments. Even a spreadsheet can reveal that an apparent colour transition happens eight clocks after a register write, or that a control line changes only during blanking. These relationships are often more reliable than visual inspection of a converted video signal.

Do not interpret every observed digital bit as a direct RGB intensity bit. A DAC input may be latched before conversion, multiplexed between channels, inverted, or combined with blanking. To establish the relationship, alter one suspected bit while holding every other input constant and measure the analogue result with an oscilloscope. Logic analysis identifies candidates; analogue measurement confirms electrical meaning.

Comparing Direct And Buffered Probing

Direct probing gives the clearest view of the original signal, but it introduces physical risk. A probe tip can slip between fine-pitch pins, and repeated access can weaken old solder joints. Use grabbers or solder temporary header wires to non-critical test points where practical. Avoid attaching heavy cables to fragile connector pins, particularly on machines that have already experienced transport damage.

Buffered probing is preferable when the signal is shared with sensitive circuitry or when many captures are required. A high-input-impedance buffer can present a lighter load and provide a safer connection point, but the buffer itself must have suitable voltage tolerance, bandwidth and propagation characteristics. Its delay is usually acceptable for identifying bus relationships, though it may complicate precise phase measurements.

An oscilloscope remains essential for the DAC side of the investigation. It can show whether a red output has distinct voltage steps, whether the output is terminated correctly, and whether a supposedly stable black level contains noise. When a logic capture says that a colour bit changed but the screen barely responds, the scope can distinguish a weak analogue step from a software or display compatibility problem.

Keep original hardware reversible. Do not cut traces simply to isolate a DAC input until the signal path is documented and a replacement plan exists. If an adapter board is needed, use removable wiring or a socketed interposer. This is a sensible approach for Australian collectors, where a damaged custom LSI may have to be sourced internationally and shipping, GST and customs handling can make a small repair unexpectedly expensive.

Turning Evidence Into A Technical Record

A useful reverse-engineering record includes board revision, machine model, power configuration, probe locations, analyser model, sampling rate, trigger settings and software used to generate the display pattern. Include annotated photographs and a pin-by-pin list of observed signals. Future work becomes much easier when someone can distinguish a confirmed connection from an educated guess.

Separate facts from interpretations. “Channel 4 changes during the write strobe” is an observation. “Channel 4 is the red intensity input” is a conclusion that needs corroboration. Mark uncertain signals as provisional and test them with a second method. This discipline prevents a plausible early theory from becoming embedded in replacement hardware or emulator code.

The final result may be a timing diagram, a palette register description, a DAC input map or a small diagnostic program. Explain how each claim was tested. If the circuit uses analogue weighting, record measured voltage steps and resistor values rather than describing the output only as “bright” or “dark”. If the exact custom LSI remains unidentified, documenting its external behaviour still provides valuable preservation data.

Share captures in formats that others can open, alongside screenshots for quick reference. X68000 owners across Australia often work with different monitor arrangements, from original Japanese displays to scan converters and modern LCDs. A clear timing diagram can help another enthusiast reproduce the result even when their screen produces a different visual outcome.

Begin with a non-invasive capture on a known-working machine, save every original measurement, and change only one variable at a time. With a logic analyser, an oscilloscope and careful notes, the X68000’s video DAC becomes a tractable engineering problem rather than a mysterious black box. Publish the pin map, timing evidence and test software so the next repairer can build on the work and keep another Japanese computer operating for years to come.